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NTE6860 Integrated Circuit NMOS - FSK Digital Modem, 600bps
Description: The NTE6860 is a MOS subsystem in a 24-Lead DIP type plastic package designed to be integrated into a wide range of equipment utilizing serial data communications. The modem provides the necessary modulation, demodulation and supervisory control functions to implement a serial data communications link, over a voice grade channel, utilizing frequency shift keying (FSK) at bit rates up to 600 bps. The NTE6860 can be implemented into a wide range of data handling systems, including stand alone modems, data storage devices, remote data communication terminals and I/O interfaces for minicomputers. N-channel silicon-gate technology permits the NTE6860 to operate using a single-voltage supply and be fully TTL compatible. The modem is compatible with the NTE6860 microcomputer family, interfacing directly with the Asynchronous Communications Interface Adapter to provide low-speed data communications capability. Features: D Originate and Answer Mode D Crystal or External Reference Control D Modem Self Test D Terminal Interfaces TTL-Compatible D Full-Duplex or Half-Duplex Operation D Automatic Answer and Disconnect D Compatible Functions for 100 Series Data Sets D Compatible Functions for 1001A/B Data Couplers Absolute Maximum Ratings: Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +7.0V Input Voltage, Vin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +7.0V Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 70C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55 to +150C Thermal Resistance, Junction-to-Ambient, RthJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +120C/W Note 1. This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (e.g. either VSS or VCC).
Power Considerations: The average chip-junction temperature, TJ, in C can be obtained from: 1. TJ = TA + (PD RJA) Where: 5 Ambient Temperature, C TA RJA 5 Package Thermal Resistance, Junction to Ambient, C/W PD 5 PINT + PPORT PINT 5 iCC x VCC, Watts - Chip Internal Power PPORT 5 Port Power Dissipation, Watts - User Determined For most applications PPORT PINT and can be neglected. PPORT may become significant if the device is configured to drive Darlington bases or sink LED loads. An approximate relationship between PD and TJ (if PPORT is neglected) is: 2. PD = K B (TJ + 273C) Solving equations 1 and 2 for K gives: 3. K = PD (TA + 273C) + RJA PD2 Where K is a constant pertaining to the particular part. K can be determined from equation 3 by measuring PD (at equilibrium) for a known TA. Using this value of K the values of PD and TJ can be obtained by solving equations 1 and 2 iteratively for any value of TA. DC Electrical Characteristics: (VCC = 5V 5%, all voltages referenced to VSS = 0, TA = 0 to +70C unless otherwise specified)
Parameter Input High Voltage Input Low Voltage Crystal Input Voltage Input Current Symbol VIH VIL Vin Iin Test Conditions All Inputs Except Crystal All Inputs Except Crystal Crystal Input Driven from an External Reference, Input Coupling Capacitor = 200pF, Duty Cycle = 50 5% Vin = VSS All Inputs Except Rx Car, Tx Data, TD, TST, RI, SH RI, SH Inputs Input Leakage Current Output High Voltage Output Low Voltage IIL VOH1 VOL1 VOL2 Output High Current Input Capacitance Output Capacitance Transmit Carrier Output Voltage Transmit Carrier Output 2nd Harmonic Input Transition Times IOH2 Cin Cout VCO V2H tr tf tr tf Output Transistion Times Internal Power Dissipation tr tf PINT All Inputs at VSS and All Outputs Open, TA = 0C Vin = 7V, VCC = VSS, TA = +25C All Outputs Except An Ph and Tx Car, IOH1 = -0.04mA, Load A All Outputs Except An Ph and Tx Car, IOL1 = 1.6mA, Load A An Ph, IOL2 = 0, Load B An Ph, VOH2 = 0.8V, Load B f = 0.1Mhz, TA = +25C f = 0.1Mhz, TA = +25C Load C Load C All Inputs Except Crystal, Operating in the Crystal Input Mode; from 10% to 90% Points, Note 2 Ctystal Input, Operating in External Input Reference Mode All Outputs Except Tx Car, From 10% to 90% Points Min 2.0 VSS 1.5 - - - 2.4 VSS VSS 0.30 - - Typ Max - - - - - - - - - - 5.0 10 VCC 0.80 2.0 -0.2 -1.6 1.0 VCC 0.40 0.30 - - - Unit V V VP-P mA mA A V V V mA pF pF
0.20 0.35 0.50 VRMS -25 - - - - - - - -32 - - - - - - - - 1.0 1.0 30 30 5.0 5.0 340 dB s s s s s s mW
Note 2. Maximum Input Transition Times are 0.1 x Pulse Width or the specified maximum of 1s, whichever is smaller.
Output Test Loads Load A: TTL Output Load for Receive Break, Digital Carrier, Mode, Clear-to-Send, and Receive Data Outputs Load B: Answer Phone Load
Test Point RL = 2.67k 1%
VCC
CT
R1 = 2.5k VI Test Point MMD6150 or Equiv
Load C: Transmit Carrier Load
100k
RL = 60k 1%
CT
MMD7000 or Equiv 100k
Simulated TTL Load
1.0F
- +
1k NTE778A or Equiv
CT
CT = 20pF = total parasitic capacitance, which includes probe, wiring, and load capacitance Pin Connection Diagram
VSS 1 Tx Data 2 Rx Brk 3 An Ph 4 ELS 5 ESS 6 TD 7 Tx Brk 8 Brk R 9 Tx Car 10 FO 11 VCC 12
24 Rx Data 23 CTS 22 ESD 21 SH 20 DTR 19 RI 18 TST 17 Rx Car 16 ST 15 Mode 14 Rx Rate 13 X'tal
24
13
1
12
1.300 (33.02) Max .225 (5.73) Max
.520 (13.2)
.100 (2.54) 1.100 (27.94) .126 (3.22) Min .600 (15.24)

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